Computer Architecture

Q 1. The DMA doesn’t make use of the MMU for bulk data transfers.

(A) true
(B) false
(C) ---
(D) ---
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Q 2. ______ translates the logical address into a physical address.

(A) mmu
(B) translator
(C) compiler
(D) linker
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Q 3. _______ is used to implement virtual memory organization.

(A) page table
(B) frame table
(C) mmu
(D) none of the mentioned
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Q 4. The binary address issued to data or instructions are called as

(A) physical address
(B) location
(C) relocatable address
(D) logical address
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Q 5. The techniques which move the program blocks to or from the physical memory is called as

(A) paging
(B) virtual memory organisation
(C) overlays
(D) framing
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Q 6. The program is divided into operable parts called as

(A) frames
(B) segments
(C) pages
(D) sheets
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Q 7. The physical memory is not as large as the address space spanned by the processor.

(A) true
(B) false
(C) ---
(D) ---
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Q 8. If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is (Where S is a term of the Basic performance equation).

(A) 3
(B) ~2
(C) ~1
(D) 6
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Q 9. Two processors A and B have clock frequencies of 700 Mhz and 900 Mhz respectively. Suppose A can execute an instruction with an average of 3 steps and B can execute with an average of 5 steps. For the execution of the same instruction which processor is faster.

(A) A
(B) B
(C) both take the same time
(D) insufficient information
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Q 10. The performance of the system is greatly influenced by increasing the level 1 cache.

(A) true
(B) false
(C) ---
(D) ---
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