Q. A user has designed JK flip flop by using the VHDL code. The output is continuously switching between 0 and 1. This condition is known as
✅ Correct Answer: (C)
race around condition
Explanation: this continuous switching of output between 0 and 1 may be the result of toggle state of the flip flop. this occurs when both the inputs j and k are high and the output toggles its previous state. this condition is called the race around the condition.