Dear candidates you will find MCQ questions of Digital Principles and System Design here. Learn these questions and prepare yourself for coming examinations and interviews. You can check the right answer of any question by clicking on any option or by clicking view answer button.
Explanation: a procedure that specifies finite set of steps is called algorithm, while a flowchart is a pictorial representation of the algorithm.
Explanation: there are two not gates required for the construction of 4-to-1 multiplexer. x0, x1, x2 and x3 are the inputs and c1 and c0 are the select lines and m is the output.
Explanation: the output will be x1, because c1 = 0 and c0 = 1 results into 1 which further results as x1. and rest of the and gates gives output as 0.
Explanation: the enable input is also known as strobe which is used to cascade two or more multiplexer ics to construct a multiplexer with a larger number of inputs. enable input activates the multiplexer to operate.
Explanation: the full form of hdl is hardware description language.
Explanation: the full form of vhdl is verilog hardware description language.
Explanation: vhsic stands for very high speed integrated circuits.
Explanation: the full form of vhdl is verilog hardware description language. the acronym of vhdl itself captures the entire theme of the language and it describes the hardware in the same manner as
Explanation: the vhdl has three coding styles are:
Explanation: let the sampling time be 1 sec. this means the counter will count the number of pulses from the unknown signal for 1sec duration and would display it after 1 sec. thus if the signal is of 800 hz, at the end of 1 sec, counter would have counted up to 800. thus, in case of high frequencies and high sampling time, counter might count beyond its limit and overflows.
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