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M

Mr. Dubey • 100.69K Points
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Q. What parameter causes the main limit on fan-out of CMOS logic in high-speed applications?

  • (A) d.c. input current
  • (B) output current
  • (C) input capacitance
  • (D) power supply voltage.
  • Correct Answer - Option(A)
  • Views: 233
  • Filed under category Digital Electronics and Logic Design
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