In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is

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Mr. Dubey

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📊 Digital Logic Circuits (DLC)

Q. In a NAND based S’-R’ latch, if S’=1 & R’=1 then the state of the latch is

(A) no change
(B) set
(C) reset
(D) forbidden

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✅ Correct Answer: (A) no change

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