πŸ“Š Digital Principles and System Design
Q. For a NAND gate, struck-at 1 fault in second input line cannot be detected if
  • (A) q is 1
  • (B) q is 0
  • (C) q changes from 1 to 0
  • (D) q changes from 0 to 1
πŸ’¬ Discuss
βœ… Correct Answer: (B) q is 0

Explanation: in a nand gate, struck-at 1 fault in the second input line cannot be detected if the output q is reset (q=0) prior to applying the test sequence.


Explanation by: Mr. Dubey
in a nand gate, struck-at 1 fault in the second input line cannot be detected if the output q is reset (q=0) prior to applying the test sequence.

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