Q. Karnaugh map is used to ?

(A) minimise the number of flip-flops in a digital circuit
(B) minimise the number of gates only in a digital circuit
(C) minimise the number of gates and fan-in of a digital circuit
(D) design gates

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✅ Correct Answer: (B) minimise the number of gates only in a digital circuit

Published by Shiva Ram ⭐ 30.44K Points at 24-Feb-2025 08:30 am in Digital Electronics and Logic Design

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