The added output of the bits of the interrupt register and the mask register is set as an input of

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Mr. Dubey

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📊 Computer Architecture

Q. The added output of the bits of the interrupt register and the mask register is set as an input of

(A) priority decoder
(B) priority encoder
(C) process id encoder
(D) multiplexer

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✅ Correct Answer: (B) priority encoder

Explanation: in a parallel priority

Explanation by: Mr. Dubey

in a parallel priority

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