Q. The output Qn of a J-K flip-flop is zero. It changes to 1 when a clock pulse is applied. The input Jn, and Kn, are respectively ?
✅ Correct Answer: (A)
1 and X
Digital Electronics and Logic Design MCQs | Page - 116
Dear candidates you will find MCQ questions of Digital Electronics and Logic Design here. Learn these questions and prepare yourself for coming examinations and interviews. You can check the right answer of any question by clicking on any option or by clicking view answer button.
Q. If both inputs of S-R NAND latch are low, the output will be ?
✅ Correct Answer: (A)
unpredictable
Q. An R-S latch is a ?
✅ Correct Answer: (C)
one bit memory element
Q. Which of the following flip flop is used as a latch ?
✅ Correct Answer: (D)
D flip-flop
Q. Which one of the following equations satisfies the JK flip-flop truth table ?
✅ Correct Answer: (A)
Qn+1 = JnQ’n+K’nQn
Q. When J = K = 1 in a J-K flip-flop, the output ?
✅ Correct Answer: (D)
toggles
Q. The characteristic equation for the next state (Qn+1) of a J-K flop is ?
✅ Correct Answer: (C)
Qn+1 = JQ’n+ K’Qn
Q. The both 1 state is forbidden for ?
✅ Correct Answer: (C)
R-S flip-flop
Q. With which decoder it is possible to obtain many code conversions ?
✅ Correct Answer: (D)
4 line to 16 line decoder
Q. The number of 4-line -to-16-line decoders required to make an 8-line-to-256-line decoder is ?
✅ Correct Answer: (B)
17
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