πŸ“Š Digital Electronics and Logic Design
Q. In a JK flip-flop, J is connected to Q’ and K is connected to Q outputs. The JK flip-flop converts into a ?
  • (A) R-S flip-flop
  • (B) D flip-flop
  • (C) T flip-flop
  • (D) Clocked R-S flip flop
πŸ’¬ Discuss
βœ… Correct Answer: (C) T flip-flop
πŸ“Š Digital Electronics and Logic Design
Q. The functional difference between SR and JK flip-flops is that ?
  • (A) JK flip-flop has a feedback path
  • (B) JK flip-flop does not require any external clock
  • (C) JK flip-flop is faster than SR flip-flop
  • (D) JK flip-flop can accept both inputs
πŸ’¬ Discuss
βœ… Correct Answer: (D) JK flip-flop can accept both inputs

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