πŸ“Š Computer Architecture
Q. The I/O interface required to connect the I/O device to the bus consists of
  • (A) address decoder and registers
  • (B) control circuits
  • (C) address decoder, registers and control circuits
  • (D) only control circuits
πŸ’¬ Discuss
βœ… Correct Answer: (C) address decoder, registers and control circuits

Explanation: the i/o devices are connected to the cpu via bus and to interact with the bus they have an interface.

πŸ“Š Computer Architecture
Q. To reduce the memory access time we generally make use of
  • (A) heaps
  • (B) higher capacity ram’s
  • (C) sdram’s
  • (D) cache’s
πŸ’¬ Discuss
βœ… Correct Answer: (D) cache’s

Explanation: the time required to access a part of the memory for data retrieval.

πŸ“Š Computer Architecture
Q. is generally used to increase the apparent size of physical memory.
  • (A) secondary memory
  • (B) virtual memory
  • (C) hard-disk
  • (D) disks
πŸ’¬ Discuss
βœ… Correct Answer: (B) virtual memory

Explanation: virtual memory is like an extension to the existing memory.

πŸ“Š Computer Architecture
Q. MFC stands for
  • (A) memory format caches
  • (B) memory function complete
  • (C) memory find command
  • (D) mass format command
πŸ’¬ Discuss
βœ… Correct Answer: (B) memory function complete

Explanation: this is a system command enabled when a memory function is completed by a process.

πŸ“Š Computer Architecture
Q. The time delay between two successive initiations of memory operation
  • (A) memory access time
  • (B) memory search time
  • (C) memory cycle time
  • (D) instruction delay
πŸ’¬ Discuss
βœ… Correct Answer: (C) memory cycle time

Explanation: the time is taken to finish one task and to start another.

πŸ“Š Computer Architecture
Q. The decoded instruction is stored in
  • (A) ir
  • (B) pc
  • (C) registers
  • (D) mdr
πŸ’¬ Discuss
βœ… Correct Answer: (A) ir

Explanation: the instruction after obtained from the pc, is decoded and operands are fetched and stored in the ir.

πŸ“Š Computer Architecture
Q. Which registers can interact with the secondary storage?
  • (A) mar
  • (B) pc
  • (C) ir
  • (D) r0
πŸ’¬ Discuss
βœ… Correct Answer: (A) mar

Explanation: mar can interact with secondary storage in order to fetch data from it.

πŸ“Š Computer Architecture
Q. During the execution of a program which gets initialized first?
  • (A) mdr
  • (B) ir
  • (C) pc
  • (D) mar
πŸ’¬ Discuss
βœ… Correct Answer: (C) pc

Explanation: for the execution of a process first the instruction is placed in the pc.

πŸ“Š Computer Architecture
Q. Which of the register/s of the processor is/are connected to Memory Bus?
  • (A) pc
  • (B) mar
  • (C) ir
  • (D) both pc and mar
πŸ’¬ Discuss
βœ… Correct Answer: (B) mar

Explanation: mar is connected to the memory bus in order to access the memory.

πŸ“Š Computer Architecture
Q. ISP stands for
  • (A) instruction set processor
  • (B) information standard processing
  • (C) interchange standard protocol
  • (D) interrupt service procedure
πŸ’¬ Discuss
βœ… Correct Answer: (A) instruction set processor

Explanation: none.

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