πŸ“Š Computer Architecture
Q. In associative mapping during LRU, the counter of the new block is set to ‘0’ and all the others are incremented by one when occurs.
  • (A) delay
  • (B) miss
  • (C) hit
  • (D) delayed hit
πŸ’¬ Discuss
βœ… Correct Answer: (B) miss

Explanation: miss usually occurs when the memory block required is not present in the cache.

Explanation by: Indresh Gehalot
miss usually occurs when the memory block required is not present in the cache.

πŸ’¬ Discussion


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