Q. The S-R flip flop consist of
✅ Correct Answer: (B)
two additional and gates
Digital Logic Circuits (DLC) MCQs | Page - 5
Dear candidates you will find MCQ questions of Digital Logic Circuits (DLC) here. Learn these questions and prepare yourself for coming examinations and interviews. You can check the right answer of any question by clicking on any option or by clicking view answer button.
Q. What is one disadvantage of an S-R flip-flop?
✅ Correct Answer: (D)
invalid state
Q. One example of the use of an S-R flip-flop is as
✅ Correct Answer: (C)
binary storage register
Q. When is a flip-flop said to be transparent?
✅ Correct Answer: (B)
when the q output follows the input
Q. On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when
✅ Correct Answer: (C)
the clock pulse transitions from low to high
Q. What is the hold condition of a flip-flop?
✅ Correct Answer: (B)
no active s or r input
Q. One example of the use of an S-R flip-flop is as
✅ Correct Answer: (C)
switch debouncer
Q. The truth table for an S-R flip-flop has how many VALID entries?
✅ Correct Answer: (C)
3
Q. When both inputs of a J-K flip-flop cycle, the output will
✅ Correct Answer: (C)
not change
Q. Which of the following is correct for a gated D-type flip-flop?
✅ Correct Answer: (A)
the q output is either set or reset as soon as the d input goes high or low
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