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Q. The correspondence between the main memory blocks and those in the cache is given by

Q. The transmission on the asynchronous BUS is also called

Q. The chip can be disabled or cut off from an external connection using

Q. RTL stands for:

Q. The effective address of the following instruction is MUL 5(R1,R2).

Q. The less space consideration as lead to the development of (for large memories).

Q. In memory read the operation puts memory address on to a register known as :

Q. The BUS that allows I/O, memory and Processor to coexist is

Q. The Sun micro systems processors usually follow architecture.

Q. The addressing mode which makes use of in-direction pointers is