πŸ“Š Computer Architecture
Q. In set associative and associative mapping there exists less flexibility.
  • (A) true
  • (B) false
  • (C) ---
  • (D) ---
πŸ’¬ Discuss
βœ… Correct Answer: (B) false

Explanation: the above two methods of mapping the decision of which block to be removed rests with the cache controller.

πŸ“Š Computer Architecture
Q. In associative mapping during LRU, the counter of the new block is set to ‘0’ and all the others are incremented by one when occurs.
  • (A) delay
  • (B) miss
  • (C) hit
  • (D) delayed hit
πŸ’¬ Discuss
βœ… Correct Answer: (B) miss

Explanation: miss usually occurs when the memory block required is not present in the cache.

πŸ“Š Computer Architecture
Q. The directly mapped cache no replacement algorithm is required.
  • (A) true
  • (B) false
  • (C) ---
  • (D) ---
πŸ’¬ Discuss
βœ… Correct Answer: (A) true

Explanation: the position of each block is pre-determined in the direct mapped cache, hence no need for replacement.

πŸ“Š Computer Architecture
Q. Highly encoded schemes that use compact codes to specify a small number of functions in each micro instruction is
  • (A) horizontal organisation
  • (B) vertical organisation
  • (C) diagonal organisation
  • (D) none of the mentioned
πŸ’¬ Discuss
βœ… Correct Answer: (B) vertical organisation
πŸ“Š Computer Architecture
Q. The signals are grouped such that mutually exclusive signals are put together.
  • (A) true
  • (B) false
  • (C) ---
  • (D) ----
πŸ’¬ Discuss
βœ… Correct Answer: (A) true

Explanation: this is done to improve the efficiency of the controller.

πŸ“Š Computer Architecture
Q. To increase the speed of memory access in pipelining, we make use of _____
  • (A) Special memory locations
  • (B) Special purpose registers
  • (C) Cache
  • (D) Buffers
πŸ’¬ Discuss
βœ… Correct Answer: (C) Cache
πŸ“Š Computer Architecture
Q. The fetch and execution cycles are interleaved with the help of _____
  • (A) Modification in processor architecture
  • (B) Clock
  • (C) Special unit
  • (D) Control unit
πŸ’¬ Discuss
βœ… Correct Answer: (B) Clock
πŸ“Š Computer Architecture
Q. _____ has been developed specifically for pipelined systems.
  • (A) Utility software
  • (B) Speed up utilities
  • (C) Optimizing compilers
  • (D) None of the mentioned
πŸ’¬ Discuss
βœ… Correct Answer: (C) Optimizing compilers
πŸ“Š Computer Architecture
Q. ______ is used to detect and correct the errors that may occur during data transfers.
  • (A) ecc
  • (B) crc
  • (C) checksum
  • (D) none of the mentioned
πŸ’¬ Discuss
βœ… Correct Answer: (A) ecc

Explanation: ecc stands for error correcting code.